Design and Implementation of an Efficient Instruction Set for Ternary Processor

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Design and Implementation of an Efficient Instruction Set for Ternary Processor

Multi Valued Logic [MVL] is emerging as a promising choice for future computing technology. MVL has seen major advancement in the recent past due to several advantages offered by them over the binary logic, thus making it a thrust area for further research. The instruction set of the processor is its inherent entity. This paper presents design and implementation of an efficient instruction set ...

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ژورنال

عنوان ژورنال: International Journal of Computer Applications

سال: 2013

ISSN: 0975-8887

DOI: 10.5120/14536-2980